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Understanding the IBIS Model
i.MX53 System Development User’s Guide, Rev. 1
Freescale Semiconductor 3-11
Correlation Level A means for categorizing I/O buffer characterization data based on how much the
modeling engineer knows about the processing conditions of a sample component
and which correlation metric he or she used.
All models (GPIO, LPDDR2, UHVIO, LVDS, LVIO) have passed the following checks:
Passes IBISCHK without errors or unexplained warnings
Data for basic simulation checked
Data for timing analysis checked
Data for power analysis checked
Correlated against Spice simulations
Validation reports can be provided upon demand.
3.8 References
Consult the following references for more information about the IBIS model.
IBIS Open Forum (http://www.eda.org/ibis/)
The IBIS Open Forum consists of EDA vendors, computer manufacturers, semiconductor vendors,
universities, and end-users. It proposes updates and reviews, revises standards, and organizes
summits. It promotes IBIS models and provides useful documentation and tools.
IBIS specification (http://eda.org/pub/ibis/ver5.0/)
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